[
  undef,
  undef,
  undef,
  undef,
  undef,
  undef,
  undef,
  undef,
  undef,
  undef,
  [
    [
      'xlpersistentdff.ngc',
      undef,
    ],
    'G:/Work/FPGA_CD/chapt8/exp8_5/netlist/sysgen/perl_results.vhd',
  ],
  [
    [
      'dds_cmplr_v4_0_f34617d41a297694.ngc',
      {
        'producer' => 'coregen',
      },
    ],
    [
      'dds_cmplr_v4_0_f34617d41a297694.vhd',
      {
        'producer' => 'coregen',
      },
    ],
    [
      'icon_1_05_a_1b7f349aaf57f307.ngc',
      {
        'producer' => 'coregen',
      },
    ],
    [
      'icon_1_05_a_1b7f349aaf57f307.vhd',
      {
        'producer' => 'coregen',
      },
    ],
    [
      'ila_1_04_a_931ec98e70229a14.cdc',
      {
        'producer' => 'coregen',
      },
    ],
    [
      'ila_1_04_a_931ec98e70229a14.ngc',
      {
        'producer' => 'coregen',
      },
    ],
    [
      'ila_1_04_a_931ec98e70229a14.vhd',
      {
        'producer' => 'coregen',
      },
    ],
  ],
]
